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On modular addition, exact-SVD EGD requires the fewest epochs to 95% accuracy at every modulus; column normalization has the lowest wall-clock time for p=97 and p=127, while RSVD rank 128 has the lowest wall-clock time for p=79. Reducing RSVD rank to 64 lowers per-epoch cost but delays threshold crossing relative to rank 128. · CiteArk